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| void | EtmV3TrcPacket::UpdateNS (const int NS) |
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| void | EtmV3TrcPacket::UpdateAltISA (const int AltISA) |
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| void | EtmV3TrcPacket::UpdateHyp (const int Hyp) |
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| void | EtmV3TrcPacket::UpdateISA (const ocsd_isa isa) |
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| void | EtmV3TrcPacket::SetType (const ocsd_etmv3_pkt_type p_type) |
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| void | EtmV3TrcPacket::SetErrType (const ocsd_etmv3_pkt_type e_type) |
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| const bool | EtmV3TrcPacket::isBadPacket () const |
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| void | EtmV3TrcPacket::SetDataOOOTag (const uint8_t tag) |
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| void | EtmV3TrcPacket::SetDataValue (const uint32_t value) |
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| void | EtmV3TrcPacket::UpdateContextID (const uint32_t contextID) |
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| void | EtmV3TrcPacket::UpdateVMID (const uint8_t VMID) |
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| void | EtmV3TrcPacket::UpdateDataEndian (const uint8_t BE_Val) |
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| void | EtmV3TrcPacket::SetCycleCount (const uint32_t cycleCount) |
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| void | EtmV3TrcPacket::SetISyncReason (const ocsd_iSync_reason reason) |
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| void | EtmV3TrcPacket::SetISyncHasCC () |
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| void | EtmV3TrcPacket::SetISyncIsLSiP () |
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| void | EtmV3TrcPacket::SetISyncNoAddr () |
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| const bool | EtmV3TrcPacket::isCtxtUpdated () const |
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| void | EtmV4ITrcPacket::updateErrType (const ocsd_etmv4_i_pkt_type err_pkt_type) |
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| void | EtmV4ITrcPacket::clearTraceInfo () |
| | clear all the trace info data prior to setting for new trace info packet. More...
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| void | EtmV4ITrcPacket::setTraceInfo (const uint32_t infoVal) |
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| void | EtmV4ITrcPacket::setTraceInfoKey (const uint32_t keyVal) |
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| void | EtmV4ITrcPacket::setTraceInfoSpec (const uint32_t specVal) |
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| void | EtmV4ITrcPacket::setTraceInfoCyct (const uint32_t cyctVal) |
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| void | EtmV4ITrcPacket::setTS (const uint64_t value, const uint8_t bits) |
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| void | EtmV4ITrcPacket::setCycleCount (const uint32_t value) |
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| void | EtmV4ITrcPacket::setCommitElements (const uint32_t commit_elem) |
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| const uint32_t | EtmV4ITrcPacket::getCCThreshold () const |
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| const uint32_t | EtmV4ITrcPacket::getP0Key () const |
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| const uint32_t | EtmV4ITrcPacket::getCurrSpecDepth () const |
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| void | EtmV4ITrcPacket::setCancelElements (const uint32_t cancel_elem) |
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| void | EtmV4ITrcPacket::setAtomPacket (const ocsd_pkt_atm_type type, const uint32_t En_bits, const uint8_t num) |
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| void | EtmV4ITrcPacket::setCondIF1 (uint32_t const cond_key) |
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| void | EtmV4ITrcPacket::setCondIF2 (uint8_t const c_elem_idx) |
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| void | EtmV4ITrcPacket::setCondIF3 (uint8_t const num_c_elem, const bool finalElem) |
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| void | EtmV4ITrcPacket::setCondRF1 (const uint32_t key[2], const uint8_t res[2], const uint8_t CI[2], const bool set2Keys) |
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| void | EtmV4ITrcPacket::setCondRF2 (const uint8_t key_incr, const uint8_t token) |
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| void | EtmV4ITrcPacket::setCondRF3 (const uint16_t tokens) |
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| void | EtmV4ITrcPacket::setCondRF4 (const uint8_t token) |
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| void | EtmV4ITrcPacket::setContextInfo (const bool update, const uint8_t EL=0, const uint8_t NS=0, const uint8_t SF=0) |
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| void | EtmV4ITrcPacket::setContextVMID (const uint32_t VMID) |
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| void | EtmV4ITrcPacket::setContextCID (const uint32_t CID) |
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| void | EtmV4ITrcPacket::setExceptionInfo (const uint16_t excep_type, const uint8_t addr_interp, const uint8_t m_fault_pending, const uint8_t m_type) |
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| void | EtmV4ITrcPacket::set64BitAddress (const uint64_t addr, const uint8_t IS) |
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| void | EtmV4ITrcPacket::set32BitAddress (const uint32_t addr, const uint8_t IS) |
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| void | EtmV4ITrcPacket::updateShortAddress (const uint32_t addr, const uint8_t IS, const uint8_t update_bits) |
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| void | EtmV4ITrcPacket::setAddressExactMatch (const uint8_t idx) |
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| void | EtmV4ITrcPacket::setDataSyncMarker (const uint8_t dsm_val) |
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| void | EtmV4ITrcPacket::setEvent (const uint8_t event_val) |
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| void | EtmV4ITrcPacket::setQType (const bool has_count, const uint32_t count, const bool has_addr, const bool addr_match, const uint8_t type) |
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| const bool | EtmV4ITrcPacket::isBadPacket () const |
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| void | PtmTrcPacket::SetType (const ocsd_ptm_pkt_type p_type) |
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| void | PtmTrcPacket::SetErrType (const ocsd_ptm_pkt_type e_type) |
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| void | PtmTrcPacket::UpdateNS (const int NS) |
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| void | PtmTrcPacket::UpdateAltISA (const int AltISA) |
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| void | PtmTrcPacket::UpdateHyp (const int Hyp) |
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| void | PtmTrcPacket::UpdateISA (const ocsd_isa isa) |
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| void | PtmTrcPacket::UpdateContextID (const uint32_t contextID) |
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| void | PtmTrcPacket::UpdateVMID (const uint8_t VMID) |
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| void | PtmTrcPacket::SetException (const ocsd_armv7_exception type, const uint16_t number) |
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| void | PtmTrcPacket::SetISyncReason (const ocsd_iSync_reason reason) |
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| void | PtmTrcPacket::SetCycleCount (const uint32_t cycleCount) |
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| const bool | PtmTrcPacket::isBadPacket () const |
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| const ocsd_ptm_pkt_type | PtmTrcPacket::getType () const |
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| const ocsd_isa | PtmTrcPacket::getISA () const |
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|
| enum | _ocsd_etmv4_i_pkt_type {
ETM4_PKT_I_NOTSYNC = 0x200,
ETM4_PKT_I_INCOMPLETE_EOT,
ETM4_PKT_I_NO_ERR_TYPE,
ETM4_PKT_I_BAD_SEQUENCE = 0x300,
ETM4_PKT_I_BAD_TRACEMODE,
ETM4_PKT_I_RESERVED,
ETM4_PKT_I_EXTENSION = 0x00,
ETM4_PKT_I_ADDR_CTXT_L_32IS0 = 0x82,
ETM4_PKT_I_ADDR_CTXT_L_32IS1,
ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85,
ETM4_PKT_I_ADDR_CTXT_L_64IS1,
ETM4_PKT_I_CTXT = 0x80,
ETM4_PKT_I_ADDR_MATCH = 0x90,
ETM4_PKT_I_ADDR_L_32IS0 = 0x9A,
ETM4_PKT_I_ADDR_L_32IS1,
ETM4_PKT_I_ADDR_L_64IS0 = 0x9D,
ETM4_PKT_I_ADDR_L_64IS1,
ETM4_PKT_I_ADDR_S_IS0 = 0x95,
ETM4_PKT_I_ADDR_S_IS1,
ETM4_PKT_I_Q = 0xA0,
ETM4_PKT_I_ATOM_F1 = 0xF6,
ETM4_PKT_I_ATOM_F2 = 0xD8,
ETM4_PKT_I_ATOM_F3 = 0xF8,
ETM4_PKT_I_ATOM_F4 = 0xDC,
ETM4_PKT_I_ATOM_F5 = 0xD5,
ETM4_PKT_I_ATOM_F6 = 0xC0,
ETM4_PKT_I_COND_FLUSH = 0x43,
ETM4_PKT_I_COND_I_F1 = 0x6C,
ETM4_PKT_I_COND_I_F2 = 0x40,
ETM4_PKT_I_COND_I_F3 = 0x6D,
ETM4_PKT_I_COND_RES_F1 = 0x68,
ETM4_PKT_I_COND_RES_F2 = 0x48,
ETM4_PKT_I_COND_RES_F3 = 0x50,
ETM4_PKT_I_COND_RES_F4 = 0x44,
ETM4_PKT_I_CCNT_F1 = 0x0E,
ETM4_PKT_I_CCNT_F2 = 0x0C,
ETM4_PKT_I_CCNT_F3 = 0x10,
ETM4_PKT_I_NUM_DS_MKR = 0x20,
ETM4_PKT_I_UNNUM_DS_MKR = 0x28,
ETM4_PKT_I_EVENT = 0x70,
ETM4_PKT_I_EXCEPT = 0x06,
ETM4_PKT_I_EXCEPT_RTN = 0x07,
ETM4_PKT_I_TIMESTAMP = 0x02,
ETM4_PKT_I_CANCEL_F1 = 0x2E,
ETM4_PKT_I_CANCEL_F2 = 0x34,
ETM4_PKT_I_CANCEL_F3 = 0x38,
ETM4_PKT_I_COMMIT = 0x2D,
ETM4_PKT_I_MISPREDICT = 0x30,
ETM4_PKT_I_TRACE_INFO = 0x01,
ETM4_PKT_I_TRACE_ON = 0x04,
ETM4_PKT_I_ASYNC = 0x100,
ETM4_PKT_I_DISCARD = 0x103,
ETM4_PKT_I_OVERFLOW = 0x105
} |
| |
| enum | _ocsd_etmv4_d_pkt_type {
ETM4_PKT_D_NOTSYNC = 0x200,
ETM4_PKT_D_BAD_SEQUENCE,
ETM4_PKT_D_BAD_TRACEMODE,
ETM4_PKT_D_RESERVED,
ETM4_PKT_D_INCOMPLETE_EOT,
ETM4_PKT_D_NO_HEADER,
ETM4_PKT_D_NO_ERR_TYPE,
ETM4_PKT_DNUM_DS_MKR = 0x111,
ETM4_PKT_D_EXTENSION = 0x00,
ETM4_PKT_DUNNUM_DS_MKR = 0x01,
ETM4_PKT_DEVENT = 0x04,
ETM4_PKT_DTIMESTAMP = 0x02,
ETM4_PKT_DADDR_P1_F1 = 0x70,
ETM4_PKT_DADDR_P1_F2 = 0x80,
ETM4_PKT_DADDR_P1_F3 = 0x14,
ETM4_PKT_DADDR_P1_F4 = 0x60,
ETM4_PKT_DADDR_P1_F5 = 0xF8,
ETM4_PKT_DADDR_P1_F6 = 0xF6,
ETM4_PKT_DADDR_P1_F7 = 0xF5,
ETM4_PKT_DVAL_P2_F1 = 0x20,
ETM4_PKT_DVAL_P2_F2 = 0x30,
ETM4_PKT_DVAL_P2_F3 = 0x40,
ETM4_PKT_DVAL_P2_F4 = 0x10,
ETM4_PKT_DVAL_P2_F5 = 0x18,
ETM4_PKT_DVAL_P2_F6 = 0x38,
ETM4_PKT_DSUPPRESSION = 0x03,
ETM4_PKT_DTRACE_INFO = 0x101,
ETM4_PKT_D_ASYNC = 0x100,
ETM4_PKT_D_DISCARD = 0x103,
ETM4_PKT_D_OVERFLOW = 0x105
} |
| |
| typedef enum _ocsd_etmv4_i_pkt_type | ocsd_etmv4_i_pkt_type |
| |
| typedef union _etmv4_trace_info_t | etmv4_trace_info_t |
| |
| typedef struct _etmv4_context_t | etmv4_context_t |
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| typedef struct _etmv4_addr_val_t | etmv4_addr_val_t |
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| typedef struct _ocsd_etmv4_i_pkt | ocsd_etmv4_i_pkt |
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| typedef enum _ocsd_etmv4_d_pkt_type | ocsd_etmv4_d_pkt_type |
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| typedef struct _ocsd_etmv4_d_pkt | ocsd_etmv4_d_pkt |
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| typedef struct _ocsd_etmv4_cfg | ocsd_etmv4_cfg |
| |