22 #include "SDL_config.h"
24 #include "../SDL_internal.h"
27 #if defined(__WIN32__) || defined(__WINRT__)
28 #include "../core/windows/SDL_windows.h"
31 #undef HAVE_SYSCTLBYNAME
34 #ifndef QSV_NUMPROCESSORS
35 #define QSV_NUMPROCESSORS 26
47 #ifdef HAVE_SYSCTLBYNAME
48 #include <sys/types.h>
49 #include <sys/sysctl.h>
51 #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
52 #include <sys/sysctl.h>
53 #elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
54 #include <sys/param.h>
55 #include <sys/sysctl.h>
56 #include <machine/cpu.h>
57 #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
62 #if defined(__QNXNTO__)
63 #include <sys/syspage.h>
66 #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH)
72 #define AT_PLATFORM 15
79 #define HWCAP_NEON (1 << 12)
81 #if defined HAVE_GETAUXVAL
88 #if defined(__ANDROID__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
90 #include <cpu-features.h>
94 #if defined(HAVE_ELF_AUX_INFO)
103 #define CPU_HAS_RDTSC (1 << 0)
104 #define CPU_HAS_ALTIVEC (1 << 1)
105 #define CPU_HAS_MMX (1 << 2)
106 #define CPU_HAS_3DNOW (1 << 3)
107 #define CPU_HAS_SSE (1 << 4)
108 #define CPU_HAS_SSE2 (1 << 5)
109 #define CPU_HAS_SSE3 (1 << 6)
110 #define CPU_HAS_SSE41 (1 << 7)
111 #define CPU_HAS_SSE42 (1 << 8)
112 #define CPU_HAS_AVX (1 << 9)
113 #define CPU_HAS_AVX2 (1 << 10)
114 #define CPU_HAS_NEON (1 << 11)
115 #define CPU_HAS_AVX512F (1 << 12)
116 #define CPU_HAS_ARM_SIMD (1 << 13)
118 #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
122 static jmp_buf jmpbuf;
124 illegal_instruction(
int sig)
136 #ifndef SDL_CPUINFO_DISABLED
137 #if defined(__GNUC__) && defined(i386)
139 " pushfl # Get original EFLAGS \n"
141 " movl %%eax,%%ecx \n"
142 " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
143 " pushl %%eax # Save new EFLAGS value on stack \n"
144 " popfl # Replace current EFLAGS value \n"
145 " pushfl # Get new EFLAGS \n"
146 " popl %%eax # Store new EFLAGS in EAX \n"
147 " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
148 " jz 1f # Processor=80486 \n"
149 " movl $1,%0 # We have CPUID support \n"
155 #elif defined(__GNUC__) && defined(__x86_64__)
159 " pushfq # Get original EFLAGS \n"
161 " movq %%rax,%%rcx \n"
162 " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
163 " pushq %%rax # Save new EFLAGS value on stack \n"
164 " popfq # Replace current EFLAGS value \n"
165 " pushfq # Get new EFLAGS \n"
166 " popq %%rax # Store new EFLAGS in EAX \n"
167 " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
168 " jz 1f # Processor=80486 \n"
169 " movl $1,%0 # We have CPUID support \n"
175 #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
177 pushfd ; Get original EFLAGS
180 xor eax, 200000
h ; Flip ID bit
in EFLAGS
181 push eax ; Save
new EFLAGS
value on stack
182 popfd ; Replace current EFLAGS
value
183 pushfd ; Get
new EFLAGS
184 pop eax ; Store
new EFLAGS
in EAX
185 xor eax, ecx ; Can not toggle ID bit,
186 jz
done ; Processor=80486
187 mov has_CPUID,1 ; We have CPUID support
190 #elif defined(_MSC_VER) && defined(_M_X64)
192 #elif defined(__sun) && defined(__i386)
197 " xorl $0x200000,%eax \n"
204 " movl $1,-8(%ebp) \n"
207 #elif defined(__sun) && defined(__amd64)
212 " xorl $0x200000,%eax \n"
219 " movl $1,-8(%rbp) \n"
228 #if defined(__GNUC__) && defined(i386)
229 #define cpuid(func, a, b, c, d) \
230 __asm__ __volatile__ ( \
232 " xorl %%ecx,%%ecx \n" \
234 " movl %%ebx, %%esi \n" \
236 "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
237 #elif defined(__GNUC__) && defined(__x86_64__)
238 #define cpuid(func, a, b, c, d) \
239 __asm__ __volatile__ ( \
241 " xorq %%rcx,%%rcx \n" \
243 " movq %%rbx, %%rsi \n" \
245 "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
246 #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
247 #define cpuid(func, a, b, c, d) \
249 __asm mov eax, func \
257 #elif defined(_MSC_VER) && defined(_M_X64)
258 #define cpuid(func, a, b, c, d) \
261 __cpuid(CPUInfo, func); \
268 #define cpuid(func, a, b, c, d) \
269 do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
295 if (
c & 0x08000000) {
297 #if defined(__GNUC__) && (defined(i386) || defined(__x86_64__))
298 __asm__(
".byte 0x0f, 0x01, 0xd0" :
"=a" (
a) :
"c" (0) :
"%edx");
299 #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219)
301 #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
305 _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
320 volatile int altivec = 0;
321 #ifndef SDL_CPUINFO_DISABLED
322 #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__)) || (defined(__FreeBSD__) && defined(__powerpc__))
324 int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
325 #elif defined(__FreeBSD__)
326 int selectors[2] = { CTL_HW, PPC_FEATURE_HAS_ALTIVEC };
328 int selectors[2] = { CTL_HW, HW_VECTORUNIT };
330 int hasVectorUnit = 0;
331 size_t length =
sizeof(hasVectorUnit);
332 int error = sysctl(selectors, 2, &hasVectorUnit, &
length,
NULL, 0);
334 altivec = (hasVectorUnit != 0);
335 #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
336 void (*handler) (
int sig);
337 handler = signal(SIGILL, illegal_instruction);
338 if (setjmp(jmpbuf) == 0) {
339 asm volatile (
"mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::
"r" (-1));
342 signal(SIGILL, handler);
348 #if defined(__ARM_ARCH) && (__ARM_ARCH >= 6)
355 #elif !defined(__arm__)
362 #elif defined(__LINUX__)
364 #include <sys/types.h>
365 #include <sys/stat.h>
375 fd = open(
"/proc/self/auxv", O_RDONLY);
379 while (read(
fd, &aux,
sizeof aux) ==
sizeof aux)
381 if (aux.a_type == AT_PLATFORM)
383 const char *plat = (
const char *) aux.a_un.a_val;
385 arm_simd = strncmp(plat,
"v6l", 3) == 0 ||
386 strncmp(plat,
"v7l", 3) == 0;
395 #elif defined(__RISCOS__)
400 _kernel_swi_regs regs;
402 if (_kernel_swi(OS_PlatformFeatures, ®s, ®s) !=
NULL)
405 if (!(regs.r[0] & (1<<31)))
410 if (_kernel_swi(OS_PlatformFeatures, ®s, ®s) !=
NULL)
420 #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
425 #if defined(__LINUX__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
427 readProcAuxvForNeon(
void)
431 const int fd = open(
"/proc/self/auxv", O_RDONLY);
433 while (read(
fd, kv,
sizeof (kv)) ==
sizeof (kv)) {
434 if (kv[0] == AT_HWCAP) {
435 neon = ((kv[1] & HWCAP_NEON) == HWCAP_NEON);
450 #if defined(SDL_CPUINFO_DISABLED)
452 #elif (defined(__WINDOWS__) || defined(__WINRT__)) && (defined(_M_ARM) || defined(_M_ARM64))
455 # if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
456 # define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
459 return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
460 #elif defined(__ARM_ARCH) && (__ARM_ARCH >= 8)
462 #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
465 #elif defined(__APPLE__)
467 #elif defined(__OpenBSD__)
469 #elif defined(HAVE_ELF_AUX_INFO) && defined(HWCAP_NEON)
470 unsigned long hasneon = 0;
471 if (elf_aux_info(AT_HWCAP, (
void *)&hasneon, (
int)
sizeof(hasneon)) != 0)
473 return ((hasneon & HWCAP_NEON) == HWCAP_NEON);
474 #elif !defined(__arm__)
476 #elif defined(__QNXNTO__)
477 return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
478 #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
479 return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
480 #elif defined(__LINUX__)
481 return readProcAuxvForNeon();
482 #elif defined(__ANDROID__)
485 AndroidCpuFamily cpu_family = android_getCpuFamily();
486 if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
487 uint64_t cpu_features = android_getCpuFeatures();
488 if ((cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0) {
494 #elif defined(__RISCOS__)
497 _kernel_swi_regs regs;
499 if (_kernel_swi(VFPSupport_Features, ®s, ®s) ==
NULL) {
500 if ((regs.r[2] & 0xFFF000) == 0x111000) {
507 #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
518 if (
a >= 0x80000001) {
520 return (
d & 0x80000000);
526 #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
527 #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
528 #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
529 #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
530 #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
531 #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
532 #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
533 #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
542 return (
b & 0x00000020);
554 return (
b & 0x00010000);
565 #ifndef SDL_CPUINFO_DISABLED
566 #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
571 #ifdef HAVE_SYSCTLBYNAME
580 GetSystemInfo(&info);
586 DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
603 static char SDL_CPUType[13];
605 if (!SDL_CPUType[0]) {
613 SDL_CPUType[
i++] = (char)(
b & 0xff);
b >>= 8;
614 SDL_CPUType[
i++] = (char)(
b & 0xff);
b >>= 8;
615 SDL_CPUType[
i++] = (char)(
b & 0xff);
b >>= 8;
616 SDL_CPUType[
i++] = (char)(
b & 0xff);
618 SDL_CPUType[
i++] = (char)(
d & 0xff);
d >>= 8;
619 SDL_CPUType[
i++] = (char)(
d & 0xff);
d >>= 8;
620 SDL_CPUType[
i++] = (char)(
d & 0xff);
d >>= 8;
621 SDL_CPUType[
i++] = (char)(
d & 0xff);
623 SDL_CPUType[
i++] = (char)(
c & 0xff);
c >>= 8;
624 SDL_CPUType[
i++] = (char)(
c & 0xff);
c >>= 8;
625 SDL_CPUType[
i++] = (char)(
c & 0xff);
c >>= 8;
626 SDL_CPUType[
i++] = (char)(
c & 0xff);
628 if (!SDL_CPUType[0]) {
629 SDL_strlcpy(SDL_CPUType,
"Unknown",
sizeof(SDL_CPUType));
640 static char SDL_CPUName[48];
642 if (!SDL_CPUName[0]) {
649 if (
a >= 0x80000004) {
651 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
652 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
653 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
654 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
655 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
656 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
657 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
658 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
659 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
660 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
661 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
662 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
663 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
664 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
665 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
666 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
668 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
669 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
670 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
671 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
672 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
673 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
674 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
675 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
676 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
677 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
678 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
679 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
680 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
681 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
682 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
683 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
685 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
686 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
687 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
688 SDL_CPUName[
i++] = (char)(
a & 0xff);
a >>= 8;
689 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
690 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
691 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
692 SDL_CPUName[
i++] = (char)(
b & 0xff);
b >>= 8;
693 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
694 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
695 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
696 SDL_CPUName[
i++] = (char)(
c & 0xff);
c >>= 8;
697 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
698 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
699 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
700 SDL_CPUName[
i++] = (char)(
d & 0xff);
d >>= 8;
703 if (!SDL_CPUName[0]) {
704 SDL_strlcpy(SDL_CPUName,
"Unknown",
sizeof(SDL_CPUName));
719 return (((
b >> 8) & 0xff) * 8);
720 }
else if (
SDL_strcmp(cpuType,
"AuthenticAMD") == 0 ||
SDL_strcmp(cpuType,
"HygonGenuine") == 0) {
798 #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
889 #ifndef SDL_CPUINFO_DISABLED
890 #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
895 #ifdef HAVE_SYSCTLBYNAME
897 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__DragonFly__)
899 int mib[2] = {CTL_HW, HW_REALMEM};
902 int mib[2] = {CTL_HW, HW_PHYSMEM};
905 int mib[2] = {CTL_HW, HW_MEMSIZE};
908 size_t len =
sizeof(memsize);
910 if (sysctl(mib, 2, &memsize, &
len,
NULL, 0) == 0) {
918 stat.dwLength =
sizeof(stat);
919 if (GlobalMemoryStatusEx(&stat)) {
927 DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
933 _kernel_swi_regs regs;
935 if (_kernel_swi(OS_Memory, ®s, ®s) ==
NULL) {
960 const size_t padding = alignment - (
len % alignment);
961 const size_t padded = (padding != alignment) ? (
len + padding) :
len;
977 const size_t padding = alignment - (
len % alignment);
978 const size_t padded = (padding != alignment) ? (
len + padding) :
len;
981 size_t memdiff = 0, ptrdiff;
985 void **realptr = (
void **) mem;
987 mem = *(((
void **) mem) - 1);
1009 if (memdiff != ptrdiff) {
1010 oldmem = (
void*) (((
size_t)
ptr) + memdiff);
1029 void **realptr = (
void **)
ptr;
1045 printf(
"CPU name: %s\n", SDL_GetCPUName());
#define SDL_assert(condition)
unsigned long long uint64_t
SDL_bool SDL_HasSSE2(void)
SDL_bool SDL_HasSSE42(void)
static SDL_bool CPU_OSSavesYMM
static int CPU_haveAVX512F(void)
SDL_bool SDL_HasARMSIMD(void)
SDL_bool SDL_HasNEON(void)
static const char * SDL_GetCPUType(void)
#define cpuid(func, a, b, c, d)
static Uint32 SDL_SIMDAlignment
static SDL_bool CPU_OSSavesZMM
SDL_bool SDL_HasSSE3(void)
SDL_bool SDL_HasAVX2(void)
SDL_bool SDL_HasSSE41(void)
#define CPU_FEATURE_AVAILABLE(f)
SDL_bool SDL_HasMMX(void)
SDL_bool SDL_HasAltiVec(void)
void SDL_SIMDFree(void *ptr)
Deallocate memory obtained from SDL_SIMDAlloc.
static Uint32 SDL_CPUFeatures
size_t SDL_SIMDGetAlignment(void)
Report the alignment this system needs for SIMD allocations.
int SDL_GetSystemRAM(void)
static int CPU_CPUIDMaxFunction
static int CPU_haveCPUID(void)
SDL_bool SDL_HasAVX512F(void)
int SDL_GetCPUCount(void)
static int CPU_have3DNow(void)
SDL_bool SDL_HasAVX(void)
static int CPU_haveAVX2(void)
void * SDL_SIMDRealloc(void *mem, const size_t len)
Reallocate memory obtained from SDL_SIMDAlloc.
static void CPU_calcCPUIDFeatures(void)
int SDL_GetCPUCacheLineSize(void)
SDL_bool SDL_HasRDTSC(void)
SDL_bool SDL_HasSSE(void)
static int CPU_haveAltiVec(void)
static Uint32 SDL_GetCPUFeatures(void)
void * SDL_SIMDAlloc(const size_t len)
Allocate memory in a SIMD-friendly way.
static int CPU_CPUIDFeatures[4]
SDL_bool SDL_Has3DNow(void)
static int CPU_haveNEON(void)
static int CPU_haveARMSIMD(void)
#define SDL_CACHELINE_SIZE
SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char const char SDL_SCANF_FORMAT_STRING const char return SDL_ThreadFunction const char void return Uint32 return Uint32 void
SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char const char SDL_SCANF_FORMAT_STRING const char return SDL_ThreadFunction const char void return Uint32 return Uint32 SDL_AssertionHandler void SDL_SpinLock SDL_atomic_t int int return SDL_atomic_t return void void void return void return int return SDL_AudioSpec SDL_AudioSpec return int int return return int SDL_RWops int SDL_AudioSpec Uint8 ** d
GLboolean GLboolean GLboolean b
GLboolean GLboolean GLboolean GLboolean a
GLuint GLsizei GLsizei * length
GLsizei const GLfloat * value
GLfloat GLfloat GLfloat GLfloat h
return Display return Display Bool Bool int int int return Display XEvent Bool(*) XPointer return Display return Display Drawable _Xconst char unsigned int unsigned int return Display Pixmap Pixmap XColor XColor unsigned int unsigned int return Display _Xconst char char int char return Display Visual unsigned int int int char unsigned int unsigned int in i)
set set set set set set set macro pixldst1 abits if abits op else op endif endm macro pixldst2 abits if abits op else op endif endm macro pixldst4 abits if abits op else op endif endm macro pixldst0 abits op endm macro pixldst3 mem_operand op endm macro pixldst30 mem_operand op endm macro pixldst abits if abits elseif abits elseif abits elseif abits elseif abits pixldst0 abits else pixldst0 abits pixldst0 abits pixldst0 abits pixldst0 abits endif elseif abits else pixldst0 abits pixldst0 abits endif elseif abits else error unsupported bpp *numpix else pixst endif endm macro pixld1_s mem_operand if asr adds SRC_WIDTH_FIXED bpl add asl mov asr adds SRC_WIDTH_FIXED bpl add asl mov asr adds SRC_WIDTH_FIXED bpl add asl mov asr adds SRC_WIDTH_FIXED bpl add asl elseif asr adds SRC_WIDTH_FIXED bpl add asl mov asr adds SRC_WIDTH_FIXED bpl add asl else error unsupported endif endm macro pixld2_s mem_operand if mov asr add asl add asl mov asr sub UNIT_X add asl mov asr add asl add asl mov asr add UNIT_X add asl else pixld1_s mem_operand pixld1_s mem_operand endif endm macro pixld0_s mem_operand if asr adds SRC_WIDTH_FIXED bpl add asl elseif asr adds SRC_WIDTH_FIXED bpl add asl endif endm macro pixld_s_internal mem_operand if mem_operand pixld2_s mem_operand pixdeinterleave basereg elseif mem_operand elseif mem_operand elseif mem_operand elseif mem_operand pixld0_s mem_operand else pixld0_s mem_operand pixld0_s mem_operand pixld0_s mem_operand pixld0_s mem_operand endif elseif mem_operand else pixld0_s mem_operand pixld0_s mem_operand endif elseif mem_operand else error unsupported mem_operand if bpp mem_operand endif endm macro vuzp8 reg2 vuzp d d ®2 endm macro vzip8 reg2 vzip d d ®2 endm macro pixdeinterleave basereg basereg basereg basereg basereg endif endm macro pixinterleave basereg basereg basereg basereg basereg endif endm macro PF boost_increment endif if endif PF tst PF addne PF subne PF cmp ORIG_W if endif if endif if endif PF subge ORIG_W PF subges if endif if endif if endif endif endm macro cache_preload_simple endif if dst_r_bpp pld[DST_R, #(PREFETCH_DISTANCE_SIMPLE *dst_r_bpp/8)] endif if mask_bpp pld if[MASK, #(PREFETCH_DISTANCE_SIMPLE *mask_bpp/8)] endif endif endm macro fetch_mask_pixblock pixld mask_basereg pixblock_size MASK endm macro ensure_destination_ptr_alignment process_pixblock_tail_head if beq irp skip1(dst_w_bpp<=(lowbit *8)) &&((lowbit *8)<(pixblock_size *dst_w_bpp)) .if lowbit< 16 tst DST_R
set set set set set set set set set set set set set set set set set set set set *set set set macro pixldst op &r &cond WK op &r &cond WK op &r &cond WK else op &m &cond &ia op &r &cond WK else op &m &cond &ia elseif elseif else error unsupported base if elseif elseif else error unsupported unaligned pixldst unaligned endm macro pixst base base else pixldst base endif endm macro PF base if bpp PF set rept prefetch_distance PF set OFFSET endr endif endm macro preload_leading_step2 base if bpp ifc DST PF PF else if bpp lsl PF PF lsl PF PF lsl PF PF PF else PF mov
set set set set set set set set set set set set set set set set set set set set *set set set macro pixldst op &r &cond WK op &r &cond WK op &r &cond WK else op &m &cond &ia op &r &cond WK else op &m &cond &ia elseif elseif else error unsupported base if elseif elseif else error unsupported unaligned pixldst unaligned endm macro pixst base base else pixldst base endif endm macro PF ptr
typedef int(__stdcall *FARPROC)()